Not a neat relay race in which chips stop mattering, then power stops mattering, then memory takes over. A system can run into several limits at once.
The book’s second chapter asks why an integrated architecture can be so difficult to reproduce. Memory makes the question tangible: an accelerator is useful as part of a working system, not as a performance figure detached from capacity, bandwidth, interconnects, power and software.
the chip is not the whole system.
neither is the bottleneck.— an author’s reading note
The research question is where the constraint moves for a particular workload. What limits the result now? Which improvement shifts that limit elsewhere? When does tighter integration remain valuable, and when does a more modular approach become useful?
A faster component is a possibility.
A useful system is the test.
Chapter 8 moves the same inquiry into energy and existing industrial sites. The Token Standard takes it towards accounting and the economics of useful results. Neither turn makes a token automatically correct, an action authorised, or a transaction settled.
This page keeps the original memory-related reading and media trail together. It is a companion to the April 2026 book, not a source of live memory prices, supply forecasts or investment recommendations. For dated corrections and developments, use the edition notes and the October afterword.